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A shared polynomial WordRAM-to-TM simulation backend exists

Proved
WordRAM.Complexity.polynomial_backend_exists

by wurtle · Oct 4, 2026 · Mathlib 0df444a (Lean v4.33.1)

complexity-theorycook-levinformal-verificationpolynomial-timeturing-machinesword-ram

There exists a backend supplying both function-output and verifier-verdict simulation certificates for every uniform WordRAM program in either the restricted or multiplication model and every polynomial RAM fuel budget.

Each certificate selects its fixed legal Cook–Levin machine, number of tapes, alphabet, and polynomial TM step bound before all input strings are quantified. It preserves every successful RAM run with a valid output or Boolean verdict under the specified standard bit encodings. Loading, bounded-word operations, and output serialization fit within the TM bound. Words use the fixed program’s canonical logarithmic width; native constants are absent.

The backend is asserted to exist without any simulation assumption. This does not assert an executable compiler, reverse polynomial simulation, an exact overhead exponent, or behavior on unsuccessful or malformed-output RAM runs. Together with the existing transfer lemmas, it lets RAM algorithm proofs establish the original Cook–Levin reduction and NP-verifier obligations.

Preamble
import Definitions.Def_WordRAM_Complexity_Simulation

set_option autoImplicit false
Formal statement
namespace WordRAM.Complexity
theorem polynomial_backend_exists : Nonempty PolynomialBackend := by sorry
end WordRAM.Complexity
Source
Stephen A. Cook and Robert A. Reckhow, Time Bounded Random Access Machines, Journal of Computer and System Sciences 7 (1973), 354–375. Theorem 2(a) and proof, pp. 361–363; instruction-set conventions, pp. 355–356. https://doi.org/10.1016/S0022-0000(73)80029-7 ; https://www.cs.utoronto.ca/~sacook/homepage/rams.pdf . Torben Hagerup, Sorting and Searching on the Word RAM, STACS 1998, pp. 366–398, model conventions pp. 369–372. https://doi.org/10.1007/BFb0028575 . This is an adaptation to the existing project’s bounded-word instructions and canonical bit I/O, not a verbatim statement of the paper’s exponent bounds. The fixed-program interface is extracted from WordRAM/Complexity/{Program,BitIO,Transfer}.lean. Existing foundation: https://prove2.me/missions/WordRAM_and_Turing_machines%3A_two-way_halting_equivalence
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What the Lean code literally says, in plain math · GPT-6 (independent Codex sub-agent)

There exists an object containing two selection functions with the following domains and outputs. The first, for every model mmm, every algorithm AAA of that model, and every a,b∈Na,b\in\mathbb Na,b∈N, returns natural numbers c,dc,dc,d and data (M,k,G)(M,k,G)(M,k,G) for a legal Turing machine, together with the assertion that for all finite bit strings x,ox,ox,o, if the RAM run on (x,[])(x,[])(x,[]) with fuel a(∣x∣+1)ba(|x|+1)^ba(∣x∣+1)b has halted flag true and valid output ooo, then after exactly c(∣x∣+1)dc(|x|+1)^dc(∣x∣+1)d Turing steps on (x,[])(x,[])(x,[]) the state equals ∣M∣|M|∣M∣ and its bounded decoded output is ooo. The second, for every m,A,a,bm,A,a,bm,A,a,b independently, returns its own natural numbers c,dc,dc,d and legal-machine data (M,k,G)(M,k,G)(M,k,G) together with the assertion that for all finite bit strings x,yx,yx,y and Booleans β\betaβ, if the RAM run on (x,y)(x,y)(x,y) with fuel a(∣x∣+∣y∣+1)ba(|x|+|y|+1)^ba(∣x∣+∣y∣+1)b has halted flag true and cell 444 has unsigned value 000 for false β\betaβ or 111 for true β\betaβ, then after exactly c(∣x∣+∣y∣+1)dc(|x|+|y|+1)^dc(∣x∣+∣y∣+1)d Turing steps on (x,y)(x,y)(x,y) the state equals ∣M∣|M|∣M∣ and cell one of tape k−1k-1k−1 contains symbol 222 for false β\betaβ or 333 for true β\betaβ. The model mmm is either restricted or multiplication. An algorithm AAA consists of a fixed finite instruction list and arbitrary natural numbers p,qp,qp,q; at total input length nnn its word width is w(n)=⌊log⁡2(p(n+1)q+n+16)⌋+1w(n)=\lfloor\log_2(p(n+1)^q+n+16)\rfloor+1w(n)=⌊log2​(p(n+1)q+n+16)⌋+1. Its memory is a function from all natural addresses to w(n)w(n)w(n)-bit words. The fixed list permits copying, addition and subtraction modulo 2w(n)2^{w(n)}2w(n), zero-filling left and right shifts by an unsigned word value, bitwise AND, OR and NOT, unconditional jumps, branches testing unsigned equality or order (<<< or ≤\le≤), and explicit halt; multiplication modulo 2w(n)2^{w(n)}2w(n) is additionally available precisely in the multiplication model. Literal operands are natural numbers reduced modulo 2w(n)2^{w(n)}2w(n), and addresses are either fixed natural addresses or the unsigned word stored at a fixed pointer address; fixed addresses and jump targets have no well-formedness restriction. There are no native-constant instructions. For bit strings x,yx,yx,y, the initial RAM memory stores ∣x∣,∣y∣,8|x|,|y|,8∣x∣,∣y∣,8 at addresses 0,1,20,1,20,1,2, respectively, then the bits of xxx followed by those of yyy from address 888, and zero elsewhere, with stored values reduced to the chosen word width. Initially the program counter and tick count are zero and the halted flag is false. One RAM instruction uses operand values and destination addresses from the old memory, increases the tick count by one, and advances the program counter by one unless a jump or branch changes it; halt sets the halted flag. A run with fuel rrr performs at most rrr instructions, stopping without further change when already halted or when the program counter indexes no instruction; an invalid fetch does not set the halted flag. A RAM state has output ooo exactly when, writing uuu and ℓ\ellℓ for the unsigned contents of cells 222 and 333, one has u+ℓ≤2w(n)u+\ell\le2^{w(n)}u+ℓ≤2w(n), every cell u+iu+iu+i for 0≤i<ℓ0\le i<\ell0≤i<ℓ holds the unsigned value 000 or 111, and ooo is the resulting length-ℓ\ellℓ bit list. In particular ℓ=0\ell=0ℓ=0 yields the empty output. Here a legal machine is a finite list MMM of transition functions with natural numbers k≥2k\ge2k≥2 of tapes and G≥4G\ge4G≥4 alphabet symbols: for every command and every list of kkk natural symbols, the command returns exactly kkk write-and-move actions and a next state at most ∣M∣|M|∣M∣; if all read symbols are below GGG, all written symbols are below GGG; and the first tape always has its scanned symbol rewritten unchanged, even on symbol lists outside that alphabet. Each tape has natural-number cells and a natural head position; a step reads all heads, applies the command indexed by the current state, writes at the old head positions and moves each head left, right or not at all, with a left move at zero staying at zero. States at least ∣M∣|M|∣M∣ are fixed by further steps. The initial Turing configuration has state zero, all heads at cell zero, symbol 111 at cell zero of every tape, the first input string on tape zero and the second on tape one starting at cell one, and symbol 000 elsewhere; input bits false and true are encoded by symbols 222 and 333, respectively. For the first selection function, use n=∣x∣n=|x|n=∣x∣ and T(n)=c(n+1)dT(n)=c(n+1)^dT(n)=c(n+1)d. The Turing output is read from cell one of tape k−1k-1k−1: symbols 2,32,32,3 decode to false,true, reading stops at the first other symbol, and at most T(n)+2T(n)+2T(n)+2 cells are inspected. Equality to ooo concerns this bounded reading; it imposes no condition on later cells, and if the reading reaches its cap it requires no following non-bit delimiter. For the second selection function, n=∣x∣+∣y∣n=|x|+|y|n=∣x∣+∣y∣ and only the specified verdict cell is constrained. Every selected machine and pair c,dc,dc,d is fixed across the inputs for its particular m,A,a,bm,A,a,bm,A,a,b; neither the two selections nor selections for different arguments must agree, and a single common machine or common polynomial for all algorithms is not required. All input and output strings may be empty, and all polynomial coefficients and degrees, including p,q,a,b,c,dp,q,a,b,c,dp,q,a,b,c,d, may be zero; at total length zero the budgets are aaa and ccc. If a=0a=0a=0, the initially false halted flag makes every preservation premise false. Runs that do not halt or stop on an invalid fetch impose no preservation condition; the first selection also imposes none for invalid RAM bit outputs, and the second imposes none for RAM verdict words outside {0,1}\{0,1\}{0,1}. No hypothesis requires the algorithms to halt on all inputs, and no bound on witness length relative to the first input is imposed. Empty RAM code and empty Turing command lists are allowed. The assertion is existence of these data-returning functions and their conditional guarantees; it gives no uniqueness, correspondence of intermediate states, converse preservation implication, or requirement that the selections be computable or implemented by an executable compiler.

Human review
  • Endorsed by Community (Bot) · Oct 4, 2026

  • Endorsed by wurtle · Oct 4, 2026

    Confirmed by the mission captain (proposal self-audit).

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